Why in news? 

Researchers at the Indian Institute of Science (IISc) have developed a design framework to build next-generation analog computing chipsets that could be faster and require less power than the digital chips found in most electronic devices.  

Highlights:

• Using a novel design framework, the team has built a prototype of an analog chipset called ARYABHAT-1 (Analog Reconfigurable technologY And Bias-scalable Hardware for AI Tasks). This type of chipset can be especially helpful for Artificial Intelligence (AI)-based applications like object or speech recognition – like Alexa or Siri – or those that require massive parallel computing operations at high speeds.
• Most electronic devices use digital chips because the design process is simple and scalable.
• In applications that don’t require precise calculations, analog computing has the potential to outperform digital computing as the former is more energy-efficient.

Technology hurdles;

• Unlike digital chips, testing and co-design of analog processors is difficult.
• As analog chips don’t scale easily, they need to be individually customised when transitioning to the next generation technology or to a new application, and their design is expensive.
• Another challenge is that trading off precision and speed with power and area is not easy when it comes to analog design.

How to overcome the hurdles?

• The team has designed a novel framework that allows the development of analog processors that scale just like digital processors. Their chipset can be reconfigured and programmed so that the same analog modules can be ported across different generations of process design and across different applications.

• Different machine learning architectures can be programmed on ARYABHAT, and like digital processors, can operate robustly across a wide range of temperatures. The researchers also say the architecture is “bias-scalable” – its performance remains the same when the operating conditions like voltage or current are modified.